Reduced Instruction Set Computer is a computer architecture in which the work accomplished by a single computer instruction has been reduced. In contrast to CISC machines, where a single instruction could perform complex functions like handling addressing modes in single instruction, RISC counts on the design philosophy that a sequence of simpler instructions can achieve the same in a more efficient way. In order to fully utilize the available computer resources and for better speeds of execution of microcodes on less powerful systems, RISC machines do not generally allow variable length instructions. Examples include MIPS, Atmel AVR, SPARC etc. Click to find out difference between RISC and CISC.
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