Arm’s protocol allows 2 mm process integration for CPU components

Arm has released the first public specification of its Chiplet System Architecture (CSA), a framework for standardizing chipset connectivity and system partitioning. The specification is now supported by more than 60 technology companies, including ADTechnology, Alphawave Semi, AMI, Cadence, Jaguar Micro, Kalray, Rebellions, Siemens, and Synopsys.

The CSA framework enables designers to create reusable chipsets that can be integrated into compliant systems, reducing development costs compared to monolithic chips. The architecture provides standards for defining and connecting chipsets into composable systems-on-chip (SoCs), allowing silicon designs to be adapted for specific market requirements.

Several vendors are implementing CSA solutions through Arm Total Design, an ecosystem built around Arm Neoverse Compute Subsystems (CSS). Alphawave Semi is using AMBA CHI C2C protocols to connect CSS-powered chipsets with proprietary I/O dies, enabling market-specific configurations for networking, edge computing, storage, and security applications. This approach allows compute die costs to be distributed across multiple system variants.

In a collaborative implementation, ADTechnology, Samsung Foundry, Rebellions, and Arm have developed an AI CPU chiplet platform for data center applications. The platform combines Rebellions’ REBEL AI accelerator with coherent NPUs using AMBA CHI C2C interconnect. The system utilizes a Neoverse CSS V3-powered compute chiplet from ADTechnology, implemented on Samsung Foundry’s 2nm Gate-All-Around process technology. Testing indicates the platform achieves 2-3x efficiency improvements for GenAI workloads when running Llama3.1 405B parameter LLMs.

The CSA framework aims to address AI workload requirements across infrastructure, automotive, and consumer technology sectors by enabling standardized chiplet integration while maintaining design flexibility through the Arm compute platform and AMBA CHI C2C communication protocols.